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Advanced Features and Techniques of Embedded Systems Software Design
Language and Programming
Advanced Features and Techniques of Embedded Systems Software Design
Software design engineers will learn how to make full use of the components available in the Zynq® System on a Chip (SoC) processing system (PS).
Course
Highlights
The emphasis of this one day course is on:
- Implementing an effective Zynq SoC boot design methodology
- Creating an FSBL image for flash
- Utilizing advanced Cortex™-A9 processor services
- Analyzing the DMA controller in the Zynq SoC
- Examining the various library services for peripherals such as Ethernet and USB controllers
Who Should
Attend
Software design engineers interested in fully using the Zynq extensible processing platform
Course
Prerequisites
- Embedded Systems Software Design or equivalent knowledge
- C or C++ programming experience
- Experience developing software for embedded processor applications
- Conceptual understanding of embedded processing systems, including device drivers, interrupt routines, Xilinx Standalone library services, user applications, and boot loader operation
Course
Benefits
After completing this comprehensive training, you will have the necessary skills to:
- Implement an effective Zynq SoC boot design methodology
- Create an appropriate FSBL image for flash simulation
- Identify advanced Cortex™-A9 processor services for fully utilizing the capabilities of the Zynq SoC
- Analyze the operation and capabilities of the DMA controller in the Zynq SoC
- Examine the various Standalone library services and performance capabilities of the Ethernet and USB controllers in the Zynq SoC
- Describe the Standalone library services available for low-speed peripherals that are contained in the Zynq SoC PS
Partners
Upcoming Program
- Please keep me posted on the next schedule
- Please contact me to arrange customized/ in-house training
Advanced Features and Techniques of Embedded Systems Software Design
Booting Overview
Objective: Introduces the main points to how booting a processor is handled in Zynq devices and MicroBlaze processors.
Boot Memory Technologies
Objective: Introduces the main points of the memories that can be booted or executed from.
Booting Flow
Objective: Provides a low-level view of the booting process.
Booting PS Processors
Objective: Introduces the concepts behind a single-core boot, a dual-core boot, and symmetric or asymmetric processing.
Booting PL
Objective: Introduces the concepts behind configuring the PL at boot.
Secure Boot
Objective: Introduces the concepts behind secure booting.
Booting FSBL
Objective: Introduces the First Stage Boot Loader (FSBL).
General Interrupt Controller
Objective: Introduces the general interrupt controller (GIC), its features, and some examples of its use.
Processor Caching and SCLR
Objective: Introduces the concepts behind processing caching and the System-Level Control Register.
NEON Co-Processing
Objective: Introduces the concepts behind the NEON co-processor.
DMA Introduction and Features
Objective: Introduces the direct memory access controller.
DMA Block Design and Interrupts
Objective: Introduces the DMA block design and the DMA interrupts.
DMA Read and Write
Objective: Introduces the concepts behind DMA reading and writing.
High-Speed Peripherals Gigabit Ethernet
Objective: Introduces the Gigabit Ethernet high-speed peripheral.
High-Speed Peripherals USB
Objective: Introduces the USB high-speed peripheral.
Low-Speed Peripherals Overview
Objective: Introduces the low-speed peripherals in the Zynq SoC.
Low-Speed Peripherals UART
Objective: Introduces the UART low-speed peripheral.
Low-Speed Peripherals CAN
Objective: Introduces the CAN low-speed peripheral.
Low-Speed Peripherals I2C
Objective: Introduces the I2C low-speed peripheral.
Low-Speed Peripherals SPI
Objective: Introduces the SPI low-speed peripheral.
Low-Speed Peripherals SD-SDIO
Objective: Introduces the SD/SDIO low-speed peripheral.
